Chips or energy: what actually bottlenecks the AI buildout in 2026?
Feb 6, 2026
Key Points
- Semiconductors, not energy, emerge as the near-term AI infrastructure bottleneck through 2026, with chips becoming the binding constraint before power generation catches up in 2027.
- ASML's monopoly on EUV lithography machines and its non-diversified supply chain create a bottleneck within the bottleneck: the Dutch company ships roughly 50 machines annually at $350 million each, far below what global fab expansion demands.
- TSMC's 90% control of advanced-node production, combined with 12-18 months required for high-yield engineering per fab, means hyperscalers betting $200 billion on AI face hidden supply risk that could dwarf near-term revenue losses.
Summary
Semiconductors, not energy, will bottleneck AI infrastructure buildout through 2026. Sam Altman puts it plainly: chips are the constraint right now, though energy likely becomes the binding problem by 2027.
The asymmetry is structural. Semiconductor production has doubled every one to two years on an exponential curve. American energy production has been flat for decades, but new capacity can flow through multiple channels: combined cycle gas plants, medium-speed reciprocating engines (Cummins manufactures roughly a million diesel engines annually and can repurpose them for power generation), or creative reallocation. Chip manufacturing offers no such flexibility. An Intel CPU cannot be repurposed for AI workloads.
The real bottleneck sits with TSMC and its supply chain. Leading-edge fabs cost $30–80 billion and take three to five years from groundbreaking to volume production. TSMC's Arizona facility, announced in 2020, still has not reached volume in 2025. The deeper constraint is ASML, the Dutch company and sole producer of EUV lithography machines. ASML ships roughly 50 machines per year at $350 million each, and leading-edge fabs require dozens of them. To expand fab capacity globally requires more EUV tooling, but ASML's own supply chain—lenses, glass, specialized components sourced from companies like Zeiss and Trump—is not diversified. This creates a bottleneck within the bottleneck.
TSMC controls 90% of the advanced-node market, with Samsung and Intel far behind. Even after a fab is operational, it takes 12–18 months of processing engineering to reach high-yield production. TSMC holds decades of intellectual capital embedded in its engineering teams that cannot be easily transferred or parallelized.
Ben Thompson argues that hyperscalers and fabless chip companies face a hidden risk by relying exclusively on TSMC to avoid geopolitical exposure. They incur a different, harder-to-see risk instead. Today's shortages "may prove to be peanuts" compared to future revenue loss if AI's potential materializes but supply remains constrained. The cost of creating Samsung or Intel as viable TSMC competitors is likely far smaller than the foregone revenue at decade's end.
Amazon's $200 billion AI capital expenditure announcement this week illustrates the scale of hyperscaler demand. Investors worry the bet will pinch near-term profits, but the deeper tension is whether available chip supply can actually keep pace with deployment ambitions.